Sonia Sunil
VLSI Design & Verification Trainee | RTL | UVM | Verilog |System Verilog | Maven Silicon | B.Tech ECE 2024
- Role
- Advanced Vlsi Design and Verification Engineer Trainee at Maven Silicon
- Location
- Kollam, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Sonia Sunil
Waiting for the right trigger, always ready to latch on.” Electronics and…
Experience
Advanced Vlsi Design and Verification Engineer Trainee
Jul 2024 — Present · Bengaluru, IN
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