Somangshu Bagchi

About Somangshu Bagchi

If one advances confidently in the direction of his dreams, and endeavors to live the life which he has imagined, he will meet with a success unexpected in common hours.\"- Henry Thoreau#Working as a Senior Lead DFT Engineer at Qualcomm India Inc. Experience: 6+ years#1.8 year experience @ Microchip Technology#Specialized in verification of different product lines (Mobile,Modem,Automotive, space etc.)#Expertise in RTL DFT rules check, Scan Insertion, Test Point Analysis and Insertion, ATPG, Notiming/Timing/Power-Aware GLS, TOP MAPPING, ICTEST, IDDQ test# Adept in RTL Design and Verification# Efficient in Perl and python scripting, Tcl-tk# Recipient of spot awards for best performance and key contributionExperience:= CX collapse pre-si validation and post-silicon phasing support, back2back patterns validation= DFT Verification for SAF and TDF= GLS Timing and notiming simulation, Low-power Aware GLS= RTL DFT checks in spyglass= Understanding of SDF and SDC implementation= Rambist and Rombist Simulation= TOP Level Mapping= Debugging various categories of faults, dc fault accounting, ac fault accountingTechnical Skills:=Hardware Design and verification=Language: Verilog, SystemVerilog, UVM=Tools: Mentor Tessent/Synopsys Verdi, VCS/Synopsys SPYGLASS 2020.12-SP1-1/Modus ISE 14.4/Aldec Riviera Pro 17••••••10/Modelsim Altera/QuestaSim/Agilent ADS=Scripting Language: Perl, Python,TCL,Pandas,Numpy=Software Programming Language: C, C++,Java s••••••••@gmail.com

Experience

1. Senior Lead Dft Engineer

   Qualcomm

   Nov 2024 — Present · IN

Education

• The University of Texas at Arlington

  Master of Science (MS), Electrical Engineering

  2014 — 2016

• Techno India College Of Technology

  Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering

  2007 — 2011

Skills

• Orcad Capture Cis
• Iar Embedded Workbench
• Agilent Ads
• Assembly Language
• Systemverilog
• Keil
• Cadence Spectre
• Perl
• Embedded Systems
• Code Composer Studio
• Matlab
• C++
• Java
• C
• Microsoft Office
• Cadence Virtuoso Layout Editor
• Modelsim
• Hibernate
• Windows
• Eclipse
• Spring Framework
• Python
• Questasim 10.0b
• Tcl
• Cadence Schematic Capture
• Cadence Icfb
• Verilog
• Cadence Virtuoso