Somanath M.
ASIC verification engineer.
- Role
- Senior Asic Verification Engineer at NVIDIA
- Location
- Hillsboro, OR, US
- LinkedIn followers
- 500 followers
About Somanath M.
4 years of work experience as a SoC level Verification Engineer. Majorly involved in functional and gate level verification.Used power aware gate level simulations basically to verify the reset release, initialization sequence and boot-up and the behavior of X’s in the simulation also supporting for the debugging of the multiple core related signatures, directed-tests, stalls and assertions.
Experience
Senior Asic Verification Engineer
Mar 2022 — Present · Hillsboro, OR, US
Education
Jawaharlal Nehru Technological University
Bachelor's degree, First Class with Distinction., Electronics and Communications Engineering
Portland State University
Master of Science - MS, Electrical, Electronics and Communications Engineering
Skills
- Very-Large-Scale Integration (Vlsi)
- System Verilog
- Soc
- Engineering
- Integrated Circuit Design
- Microsoft Office
- Vlsi
- Electronics
- Vhdl
- C++
- Verilog
- Perl
- Functional Verification
- C
- Asic
- Tcl
- Matlab
- Cmos
- Modelsim
- Rtl Design
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