Soma Sai Charitha y

About Soma Sai Charitha y

I am a Master\'s graduate student from Portland State University (PSU) with main focus in Digital IC design, Verification and Validation and also having strong foundation of concepts in Computer Architecture, Systemverilog and FPGA Design.I have 3 years of experience in Hardware design and Automated test Equipment development for various applications. I worked as SOC Design Validation Engineer Intern for about 7 months and worked on validation of SOC design for debug features.I am currently working as Design verification Engineer at Ventana Micro Systems.• Hardware Description Language: SystemVerilog, Verilog• Software: C, Python, National Instruments Labview, National Instruments Teststand• EDA Tools: QuestaSim, Xilinx Vivado, CADENCE Virtuoso, Veloce.• Hardware: Xilinx Artix-7 FPGA, National Instruments Data Acquisition Systems.• Operating Systems: Linux, Windows

Experience

1. Design Verification Engineer

   Ventana Micro Systems

   Jan 2023 — Present · Cupertino, CA, US

Education

• Portland State University

  Master of Science (MS), ELECTRICAL AND COMPUTER ENGINEERING

  2017 — 2018

• Visvesvaraya Technological University

  Bachelor of Engineering (B.E.), Electronics and Communication engineering

  2009 — 2013

Skills

• Ni Teststand
• Microsoft Office
• Verilog
• Engineering
• Ni Multisim
• Ni Labview
• C
• Programming
• Ni Fpga
• Python
• Windows
• Microsoft Word
• Electronics
• Teamwork
• Cadence Virtuoso
• Microsoft Excel
• Powerpoint
• Matlab