Socien Asifa
Physical Design Engineer | VLSI enthusiast | Seeking job opportunities in Semiconductor industry
- Role
- Asic Physical Design Engineer at Capgemini Engineering
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Socien Asifa
As a Physical Design Engineer, I have done Logic Synthesis, Floorplan, Placement, CTS and routing and Timing analysis and achieved timing closure. Performed Signoff stages and finally generated GDS-II file.I have implemented unified RTL-GDS flow using Synopsys Fusion Compiler.Have strong MOS and CMOS fundamentals with hands on experience in industry standard tools like Synopsys Fusion Compiler, Design Compiler, PrimeTime, ICC2, Calibre by Siemens EDA, and tanner tools Along with indepth Knowledge of full Physical Design flow including Synthesis.I believe knowledge is the true wealth, and this pursuit of true wealth is my driving force to learn new things and have a meaningful life. Very passionate about VLSI domain. Eager to contribute my skills and give the best possible results.
Experience
Asic Physical Design Engineer
Nov 2024 — Present · Bengaluru, IN
Education
Jawaharlal Nehru Technological University Kakinada
Bachelor of Technology, Electrical and Electronics Engineering
2019 — 2023
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