Smitha K Ranganath
FPGA IP Design Engineer at Intel Corporation
- Role
- Fpga Ip Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Smitha K Ranganath
A results-driven, customer-focused, an articulate and analytical Technical Lead with 14+ years of professional experience in diverse facets of FPGA Design, Development and testing on Hardware.Experienced in designing for Xilinx and Altera FPGA’s. Relevant exposure to tools like Xilinx ISE, Xilinx PlanAhead, Altera Quartus II, ModelSim, Protocompiler. Comfortable with both VHDL and Verilog.Experience in working with clients at on sites, requirements gathering & support at client place.
Experience
Fpga Ip Design Engineer
May 2022 — Present
Education
National College
PUC, PCMB
1999 — 2001
Govt. Junior College
SSLC
1998 — 1999
AMC college from VTU university
Bachelor of Engineering, Telecommunications Engineering
2001 — 2005
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