Skanda Krishnan Balasubramanian

RTL Design Engineer in ASIC/FPGA Proficient in Verilog | SystemVerilog | Python | C/C++ | UVM | Memory | STA

Role
Memory Phy Rtl Design Engineer at AMD
Location
Boston, MA, US
LinkedIn followers
500 followers

About Skanda Krishnan Balasubramanian

My name is Skanda Krishnan and I am currently looking for opportunities in ASIC/FPGA…

Experience

  1. Memory Phy Rtl Design Engineer

    AMD

    Jun 2025 — Present · Boxborough, MA, US

Education

  • University at Albany

    Master's degree

    2023 — 2024

  • College of Engineering Trivandrum

    Bachelor of Technology - BTech

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Skanda Krishnan Balasubramanian — Memory Phy Rtl Design Engineer at AMD in Boston, MA, US | Unifers