John Sebastian
Applications Engineering, Sr Engineer @ Synopsys Inc
- Role
- Sr Engineer at 新思科技股份有限公司
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About John Sebastian
FPGA Engineer with hands-on experience in FPGA-based prototyping on Synopsys HAPS,focusing on HAPS platform validation, PNR debug, tool flow optimization, and multi-FPGA designbring-up. Skilled at diagnosing design failures, timing violations, tool inconsistencies, andpartitioning challenges across large prototypes.My expertise includes: FPGA-based prototyping on Synopsys HAPS. ProtoCompiler flow bring-up, debugging, and regression validation. Multi-FPGA partitioning, timing closure, and PNR debug. RTL integration, test case development, and feature validation. Automation using Tcl, Python, and Bash for large-scale regressions.I am passionate about accelerating SoC development by transforming RTL into high-performance, silicon-accurate FPGA prototypes that uncover design issues early, reduce risk, and improve time-to-market.Let’s connect to discuss FPGA prototyping, HAPS platforms, ProtoCompiler flows.
Experience
Sr Engineer
Jun 2022 — Present · Bengaluru, IN
Education
College of Engineering Chengannur
Bachelor of Technology, Electrical and Electronics Engineering
2014 — 2018
National Institute of Technology, Goa
Master of Technology - MTech, VLSI
2020 — 2022
Central Board of Secondary Education
Mathematics and Computer Science
2012 — 2014
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