Sivasubramanian M.
Senior Lead Verification Engineer
- Role
- Principal Engineer at Marvell Technology
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Sivasubramanian M.
10+ Experience in VLSI ASIC/FPGA SOC Hardware Design/Verification/Validation/Testing.Areas of Expertise:* ASIC SOC Verification - Mobile, Security, Automobile, SSD Controller, AI Embedded Vision CNN Processor* IP Verification - NAND Flash Controller,PCIE,NVME* LowPower Architecture, Design, Methodologies & Verification,Power state assertions and coverage * LowPower Techniques & Features, Innovation* UPF Standards* Verification Methodologies - UVM, SV* Jasper Formal verification - low power verification app* PG netlist Gate level simulation with UPF* SOC/Full-chip Architecture* SOC/Full-chip Verification* FPGA Board Bring up and validation* Workflow Automation using Perl/TCL,Makefile, shell * Complex Problem Solving
Experience
Principal Engineer
Jun 2024 — Present · Bengaluru, IN
MCM-AI compute chiplet low power verification Functional verification for MCM - memory chiplet Die-Die communication
Skills
- Fpga
- Asic
- Asic Verification
- Validation
- Functional Verification
- Verilog
- Field-Programmable Gate Arrays (Fpga)
- Application-Specific Integrated Circuits (Asic)
- Rtl Design
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