Sivaram Eluru

Senior Lead Engineer at Qualcomm | CPU-ARM,ARC,Nuvia- Synthesis/STA Engineer

Role
Senior Lead Engineer at 高通
Location
Hyderabad, TG, IN
LinkedIn followers
500 followers

About Sivaram Eluru

I have done my Masters in Embedded Systems from BITS Pilani Goa Campus with CGPA: 7.558I have hands on experience in the EDA tools like Cadence virtuoso, NC Verilog, Encounter, Mentor Graphics and Xilinx ISE, EDK and SDK and familiar with Synopsis I have worked on the programming languages like C, Verilog HDLI have done a couple of projects on FPGA(Interfacing the peripherals and also some image processing techniques), General purpose processor(Designing of control path and Data path for basic Assembly instructions) RTL to GDSII flow, Physical Design, Verification (Writing test benches to RTL code) The areas of projects that I have worked mostly are on VLSI Design, Verification, VLSI Architecture, Embedded Systems, FPGA Development, ASIC, Image processing and DSPApart from Academics I have done a active role in college level fests in my B. Tech and I have acted as a Co-ordinator in Convocation 2014 at BITS Pilani Goa Campus I am looking for a entry level position in the field of VLSI and FPGA domains

Experience

  1. Senior Lead Engineer

    高通

    Jan 2024 — Present · Hyderabad, IN

    Synthesis/Constraints/Low Power/LEC/CLP/STA

Education

  • Vignan Institute of Information and Technology

    Bachelor's Degree, Electrical, Electronics and Communications Engineering

    2009 — 2013

  • Birla Institute of Technology and Science, Pilani

    Master's degree, Embedded Systems

    2013 — 2015

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Sivaram Eluru — Senior Lead Engineer at 高通 in Hyderabad, TG, IN | Unifers