Sivabalan M

About Sivabalan M

Dedicated Silicon Validation Engineer at Wipro, specializing in meticulously validating and enhancing the power efficiency and performance of Intel chips [System on a chip]. With a commitment to seamless delivery aligned with design requisites, I consistently surpass specified benchmarks. •Proven expertise in validating and debugging diverse chipsets, utilizing reference validation platforms to ensure functionality, power efficiency, and performance integrity. Utilizing NI-DAQ, I apply advanced power validation techniques, ensuring precise and efficient power management within systems. •Robust Background in SOC power debugging for customer platforms, overseeing power activity to optimize and troubleshoot system-on-chip performance. •Proficient in Linux environments with hands-on experience in system administration, shell scripting, and troubleshooting. •Extensive Experience in Power Optimization and Performance Enhancement on Linux and Chrome Book platform with a focus on industrial benchmark to ensure highest level of performance, efficient power and user friendly.•Thorough Knowledge in Platform Debugging, Hardware Debugging and utilized Lauterbach, XTP and ITP Tool with the help of PythonSV to facilitate power and performance Debug. •Experience in Intel Silicon Power and Performance Validation with Different Key performance indicator (KPI)cases, Involve System State, Sleep State, Core State and Package State. •Hands-on-Experience in Python Scripting and C programming language.Feel free to Contact:

Experience

1. Power Engineer

   Qualcomm

   Jun 2025 — Present

Education

• Karpagam College of Engineering

  Bachelor of Engineering - BE

  2017 — 2021

• Sri Ramakrishna Vidyaalaya Matric Higher Secondary school

  HSC

  2015 — 2017