Sivasai B
Advanced RTL Design and Verification trainee | Fresher B.Tech 2023 Graduate
- Role
- Design and Verification Engineer at Vlsi First
- Location
- Kurnool, IN
- LinkedIn followers
- 500 followers
About Sivasai B
B.Tech in Electronics and Communication Engineering.I have strong knowledge on the digital design,Verilog,UART and SPI Protocols.I have good communication skills and exploring new things and concepts (Immediate Joinee). I have completed my B.Tech graduation at Rayalaseema University College Of Engineering in kurnool with 80%. I have done my Intermediate at Govt Jr College in Nallamada with 8.86 CGPA and my schooling in ZPH School in Nallamada with 7.8 CGPA.
Experience
Design and Verification Engineer
May 2023 — Present · Bengaluru, IN
Education
Rayalaseema University College of Engineering
Bachelor of Technology - BTech, Electronics and Communications Engineering, 8.51 CGPA Percentage:- 79%
2019 — 2023
Government Junior College Nallamada
Intermediate, Mathematics, 8.86 CGPA Percentage:- 84%
2017 — 2019
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