Siva Ramakrishna Malla
Design Verification Engineer at Synopsys Inc || Ex -GF
- Role
- Asic Digital Design, Sr Staff Engineer at Synopsys Inc
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Siva Ramakrishna Malla
1.High speed serdes(HSS)-60G and 112G2.PCIe Gen63.Verilog, System verilog and UVM
Experience
Asic Digital Design, Sr Staff Engineer
May 2026 — Present · Hyderabad, IN
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.