Simran Gera
Senior Analog Layout Engineer at Texas Instruments
- Role
- Senior Layout Engineer at Texas Instruments
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Simran Gera
Efficient techniques for Matching, minimise parasitics, performance of the circuit.Understanding of signal flow, shielding, Crossralk, Electromigration, IR drop, Deep NWell.Have debuging skills in physical verfication checks like DRC, LVS, Antenna.Knowledge of semiconductor devices and fabrication.Experience in 4nm Samsung, 8nm Samsung, 14nm GF and 28nm Tsmc Have working knowledge on virtuso-l, virtuoso-xl, Synopsys Custom Compiler.Have worked on PV verification tools - Mentor graphics Calibre and ICV Worked on Opamp, Differential pair, Current Mirror,Bgr.Worked on VCO blocks.
Experience
Senior Layout Engineer
Jan 2022 — Present · Bangalore Urban, IN
Education
Seth Jai Prakash Mukund Lal Institute Of Technology
Bachelor of Technology - BTech
2014 — 2018
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