Sidharthi Palanisami

Rf and Analog Device Engineer - Layout Designer @Intel

Munich, DE
MOBILE NUMBERS
+91 *********19

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WORK HISTORY

Jan 2016 — Present

Rf and Analog Device Engineer - Layout Designer @Intel

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Munich, DE

EDUCATION

2013 — 2015

Technische Universität München

Master of Science (MS)

2009 — 2013

Dr.Mahalingam College of Engineering and Technology

Bachelor of Engineering (B.E.)

SKILLS

MicrocontrollersGardeningMicrosoft ExcelMicrosoft OfficeC++ LanguageVhdlDanceC++Embedded SystemsSportsData StructuresMicrosoft WordUbuntuAssembly LanguageCLabviewJavaArduinoMicroprocessorsMatlabXilinx Ise

ABOUT SIDHARTHI PALANISAMI

RF and Analog Device Engineer at Intel Corporation

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Sidharthi Palanisami — Rf and Analog Device Engineer - Layout Designer at Intel in Munich, DE | Unifers