Sidharth S Iyer
Analog Validation Engineer @ Texas Instruments
- Role
- Analog Validation Engineer at Texas Instruments
- Location
- Kottayam, KL, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Analog Validation Engineer
Jul 2024 — Present · Bengaluru, IN
Education
National Institute of Technology Calicut
Bachelor of Technology - BTech
2020 — 2024
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