Siddhesh Patil
System Engineer @ GE Vernova| Electrical Design| EPLAN Design| Application Engineering
- Role
- System Engineer at GE Vernova
- Location
- Nagpur, MH, IN
- LinkedIn followers
- 500 followers
About Siddhesh Patil
Passionate and skilled Electrical Design Engineer with 4+ years of extensive experience in designing electrical circuits for automation panels, machine control panels, and power panels. Adept at handling complex projects from inception to completion, ensuring the successful installation and operation of machinery. Demonstrated ability to manage customer relationships and tailor solutions to meet specific needs, enhancing overall satisfaction. Proven managerial skills with experience in leading a team of engineers and technicians to achieve project goals efficiently and effectively.
Experience
System Engineer
Oct 2025 — Present · Chennai, IN
Education
Anjuman College of Engineering, Sadar
Bachelor of Engineering - BE, Electrical and Electronics Engineering
Birla Institute of Technology and Science, Pilani
Master of Technology - MTech, Micro Electronics
Anjuman Polytechnic Nagpur
Diploma in Engineering, Electrical Engineering
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