Siddharth M.
Senior Advanced IC Packaging Design Engineer @ Nvidia | Ex-Cadence | MBA | Certified Interconnect Designer
- Role
- Senior Package Layout Engineer - Hardware at 英伟达
- Location
- Raleigh, NC, US
- LinkedIn followers
- 500 followers
About Siddharth M.
Principal Engineer | Expert in High-Speed PCB Design, 3D IC Packaging, Signal Integrity, and EMI/EMC ComplianceWith 15 years of hands-on experience, I specialize in the design, testing, and validation of high-speed PCBs and 3D IC solutions. My expertise spans across Signal Integrity (SI), Power Integrity (PI), and EMI/EMC compliance, ensuring robust and reliable electronic hardware systems for advanced technologies.Key Expertise: • High-Speed PCB Design: Designed and tested high-speed systems, including routers, switches, and servers. • 3D IC Packaging & SI/PI Analysis: Proficient in Cadence APD tools, thermal analysis, and SI/PI optimization for cutting-edge 3D-IC designs. • Hardware Product Development: Led three complete hardware (mixed-signal) product design cycles from concept to delivery. • Compliance Testing: Implemented stringent EMI/EMC, environmental, and other compliance testing standards. • Industry Tools: Mastery of Cadence Allegro, Altium Designer, and Mentor Graphics for seamless product development and PCB layout design. • Cross-Functional Collaboration: Worked closely with fabrication, assembly, and vendor teams to ensure high-quality production outcomes.At Cadence Design Systems, I’ve contributed to breakthroughs in PCB and IC packaging design, ensuring products meet the highest industry standards for performance and compliance. My deep technical knowledge and innovative approach help drive the development of high-performance electronics that align with the future demands of the industry.I’m passionate about advancing electronics hardware, driving innovation in analog semiconductors, and ensuring product reliability in the face of environmental challenges. My goal is to continue creating solutions that push the boundaries of what’s possible in electronics.
Experience
Senior Package Layout Engineer - Hardware
Jan 2026 — Present · Raleigh, NC, US
Senior Advanced IC Packaging Design Engineer @ Nvidia | Certified Interconnect Designer
Education
Kurukshetra University
B.Tech, ECE
2006 — 2010
Boston University
Master of Business Administration - MBA, Business Administration and Management, General
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