Siddhant Yadav

About Siddhant Yadav

With 11+ years of experience in ASIC verification, I specialize in delivering robust, high-quality verification solutions for complex integrated circuit designs. My expertise spans OVM, UVM, SystemVerilog, Verilog, and C programming, combined with a strong focus on formal verification methodologies to ensure design correctness and reliability.I bring a holistic understanding of hardware architecture and firmware interaction, enabling seamless integration during verification. Over the years, I’ve successfully led numerous IP verification projects, driving methodology excellence and mentoring teams to achieve verification goals efficiently.Core Expertise-Verification Leadership: Extensive experience as IP Verification Lead across multiple projects-Formal Verification: Advanced methodologies for design robustness-Protocol & IP Expertise-USBPD3.0 -DC-DC & AC-DC converters -Multiphase Controller & Gate Drivers -DMA Controller, DDR4 Controller, DPTX Controller, Crypto IPs-Bus Protocols: AXI, AHB, APB-Specialized Domains-ROM-only chips -Hardware-firmware coordination -Digital Mixed Signal (DMS)-Mixed Signal Design VerificationAutomation & Scripting:Perl, Python, Bash, Tcl, Make (Makefile scripting) for workflow automation and efficiency

Experience

1. Senior Principal Engineer

   onsemi

   Jan 2025 — Present · Bengaluru, IN

Education

• Motilal Nehru National Institute Of Technology

  Bachelor of Technology (BTech), Electronics and Communications Engineering

  2010 — 2014

• Central Academy

  10+2, PCM

  2010

Skills

• Ip Verification
• Universal Asynchronous Receiver/Transmitter (Uart)
• Ddr3
• Simvision
• Axi
• Spi
• Display Port
• Amba Ahb
• Serial Ata (Sata)
• Systemverilog
• System Verilog
• Uvm
• Verilog
• C++
• I2c
• Soc Verification
• Hdmi
• System Verification
• C