Siddalingesh Tenginakai
ASIC-Electrical analysis and convergence engineer
- Role
- Asic-electrical Analysis and Convergence Engineer at Google
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Asic-electrical Analysis and Convergence Engineer
Oct 2021 — Present · Bengaluru, IN
Education
MSRIT
BE
2007 — 2011
Alva's PU college Moodbidre
Science
2005 — 2007
Skills
- Asic
- Problem Solving
- Rtl Coding
- Vhdl
- Ir Drop Analysis
- Vlsi
- Em and Esd Analysis
- Rtl Design
- Very-Large-Scale Integration (Vlsi)
- Verilog
- Functional Verification
- Perl
- Soc
- Static Timing Analysis
- Physical Design
- Synopsys Primetime
- Compilers
- Logic Synthesis
- Mvtool (Mvrc)
- Tcl
- Lvs
- Calibre (Drc and Lvs)
- Cadence Virtuoso
- Modelsim
- Application-Specific Integrated Circuits (Asic)
- Physical Design(Backend Design in Vlsi)
- Timing Closure
- Power Ic
- Ic Compiler
- Power Grid Creation
- System on a Chip (Soc)
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