Shyam Sharma
Semiconductor and storage technology leader/Distinguished Engineer at Cadence Design Systems
- Role
- Distinguished Engineer at Cadence
- Location
- San Francisco, CA, US
- LinkedIn followers
- 500 followers
About Shyam Sharma
More than 26 years of Industry leadership in complex processor, Interfaces and memory subsystem including analysis, design, implementation, and system testing. Accomplished engineer with multiple patents and 25+ Internal/external publications/talk sessions at international conferences like DAC, DVCON, FMS, VLSI Design, Test Conference etc. Area of expertise includes Processor Architecture, Server/Low Power/High bandwidth/Graphics DRAM memories, CXL, Flash/Non-volatile memory, Cards (SDCard/SDIO/eMMC/UFS), Memory subsystems, PHY and Verification IP.Excellent communication, analytical, interpersonal, team leading skills.
Experience
Distinguished Engineer
Dec 2025 — Present · San Francisco, CA, US
Education
Indian Institute of Technology, Kanpur
B.Tech.
1995 — 1999
Skills
- Ic
- Hdls (Verilog/Vhdl/System Verilog)
- Memory Architecture (Flash/Dram)
- Programing (C/C++)
- Logic Simulators
- Soc
- Software Engineering
- Protocols (Plb/Pci-X Etc)
- Algorithms
- Leadership
- Uvm/Ovm
- Data Structures
- Wire Harness
- Functional Verification
- Systemc
- Powerpc
- Processor Architecture
- Low Power Memories (Lpddr2/Lpddr3)
- Hardware Modeling
- Testing
- Verilog
- Plug Able Storage Cards (Sdcard/Sdio)
- Eda
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