Shweta Patel
Silicon Design Engineer at Microsoft
- Role
- Silicon Design Engineer at Microsoft
- Location
- Fort Collins, CO, US
- LinkedIn followers
- 500 followers
About Shweta Patel
Masters student at Arizona State University, focusing on VLSI Design and Computer Architecture. I completed my Bachelors in Electronics Engineering from University of Mumbai in Summer 2019.My interest in the semiconductor industry lies in the design of hardware. I have experience in Physical design of IP logic using FinFETS. I also have developed projects in Register Transfer Level coding using Verilog HDL. Developed testbench in System Verilog. I am always on the lookout for upgrading my skills and I have 2 relevant certificates from Udemy(one complete, one ongoing). I am a hardworking and ambitious person looking to make my contribution to the Semiconductor Industry.Currently I am looking for Internships in RTL logic, Digital Design, Vlsi Design. I would love for you to connect with me at s••••••••@gmail.com for any such opportunities.
Experience
Silicon Design Engineer
Jan 2021 — Present · Fort Collins, CO, US
Education
Ira A. Fulton Schools of Engineering at Arizona State University
Master's degree
2019 — 2020
University of Mumbai
Bachelor of Technology - BTech
2015 — 2019
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