Shwetank Sharma

About Shwetank Sharma

Over several years of extensive experience in physical design with good understanding of Physical Design/STA and signoff flow from RTL to GDSII. Extensive experience in high frequency/area/power critical multi million instances based design tape-outs. Experience in all aspects of netlist to GDSII delivery of complex subsystems including modem 5G /DDR/Memory controllers.Understanding of STA/IR analysis/Physical Verification on tech nodes 14ff/10nm/5lpe/4ff and beyond.Experienced team lead for highly complex partition owners with responsibility for timely closure and technical problem solving on day to day basis.

Experience

1. Physical Design Engineer

   onsemi

   Dec 2024 — Present

Education

• National Institute of Technology Calicut

  Bachelor’s Degree, Electrical, Electronics and Communications Engineering

Skills

• Low-Power Design
• Static Timing Analysis
• Modelsim
• Vlsi
• Floorplanning
• Eda
• Tcl
• Timing Closure
• Primetime
• Drc
• Asic
• Logic Synthesis
• Very-Large-Scale Integration (Vlsi)
• Lvs
• Ic
• Integrated Circuit Design
• Physical Design
• Verilog
• Application-Specific Integrated Circuits (Asic)
• Soc
• Physical Verification