Shweta Anugu

About Shweta Anugu

As a System-on-Chip (SoC) Design Engineer at Apple for over eight years, expertise lies in creating advanced SoC solutions powered by ARM architectures. Proficient in RTL design, low-power management techniques, and integration of ARM Cortex-M processors, contributing to cutting-edge designs that enhance performance and efficiency. Skilled in debugging and resolving clock domain crossing issues, ensuring robust synchronization schemes and reliable system performance. Previous experience includes designing IoT-focused SoCs at Marvell Semiconductor and OMAP ICs at Texas Instruments, building a strong foundation in ASIC development. Adept at collaborating with cross-functional teams to support silicon validation, driver development, and chip bring-up efforts. Committed to delivering innovative solutions that drive technological advancements in the semiconductor industry.

Experience

1. Asic Design Engineer

   Broadcom

   Jul 2025 — Present · San Jose, CA, US

Education

• Texas A&M University

  Master of Engineering, Electrical Engineering

  2007 — 2009

• Birla Institute of Technology and Science, Pilani

  B.E(Hons), Electronics and Instrumentation

  2002 — 2006

Skills

• Ocp
• Amba
• Application-Specific Integrated Circuits (Asic)
• Jtag
• Axi
• Perl
• Formal Verification
• Conformal Lec
• System on a Chip (Soc)
• Vlsi
• Integrated Circuits (Ic)
• Asic
• Testing
• Logic Synthesis
• Simulations
• Ic
• Rtl Design
• Clp
• Rtl Coding
• Static Timing Analysis
• Very-Large-Scale Integration (Vlsi)
• Spyglass
• Upf
• Verilog
• Interconnects
• Sdh
• Dft
• Arm Architecture
• I2c