Shubham Jain
Silicon Design Verification
- Role
- Silicon Dv Engineer 1 at Google
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Shubham Jain
Highly Skilled in front end Risc-v based IP/SoC verification with strong concepts in Verilog, System Verilog, UVM, Perl and peripheral protocols USB, I2C. Proficient in developing verification environment and writing checkers individually.
Experience
Silicon Dv Engineer 1
Jun 2025 — Present
Education
Deen Bandhu Chhotu Ram University of Science and Technlogy
Bachelor's degree, Electronics and Communications Engineering
2012 — 2016
Vaish Public School
High School, Science( non medical )
2010 — 2012
Skills
- Embedded Systems
- Powerpoint
- Microsoft Excel
- Robotics
- Verilog
- Vhdl
- Electronics
- Drama
- Teamwork
- Vlsi
- English
- Automation
- Home Automation
- C/C++
- Digital Electronics
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