Shubham Giradkar
Senior Analog layout Lead at Intel corporation
- Role
- Senior Analog Layout Design Lead at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Shubham Giradkar
I have hands on project experience and deep practical knowledge on 3nm, 5nm, 7nm, 10nm, 14nm, 22nm FinFET, 28nm FDSOI, 40nm, 65nm, 90nm, 160nm and 180nm MOSFET node technologies.
Experience
Senior Analog Layout Design Lead
Jun 2024 — Present · Bengaluru, IN
Education
KDK College of Engineering, Nagpur
Bachelor's degree, Electrical and Electronics Engineering
2011 — 2015
Nagpur University
Bachelor's degree, Electrical and Electronics Engineering
2011 — 2015
Skills
- Electronics
- Semiconductors
- Vlsi
- Analog Layout
- Finfet 14nm
- Asic
- System Verilog
- Verilog
- Physical Design
- C
- Cmos
- C++
- Microsoft Office
- Programming
- Vhdl
- Matlab
- Cadence Virtuoso
- Analog Circuit Design
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