Shriraksha B K
Analog Layout design, Staff Engineer at Synopsys Inc.
- Role
- Layout Design Staff Engineer at 新思科技股份有限公司
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Shriraksha B K
I am currently working as Analog and memory layout design engineer. Worked on different technology nodes like, 180nm, 130nm, 90nm, 40nm,28nm, 14nm,7nm,5nm, 3nm & 2nm. Keen learner and an enthusiast. Designed Analog blocks such as OTA, RLC matching circuits,High Speed amp for SERDES, PLL, CTLE, LNA, Pre-amps, Mixers, VGA, DAC, SARADC, Level shifters, ESD clamps and LC_VCO.Memory block layout designs include leaf cells needed for SRAM such as word-line drivers, precharge, column mux, decoders, latches, sense amplifiers, read_write drivers, control block, Scan block, General purpose I/Os Din and Dout. Also designed standard cells for various drive strengths for 9 tracks.
Experience
Layout Design Staff Engineer
Oct 2024 — Present · Bengaluru, IN
Education
Sri Kumarans children home
PUC, PCMB
2012 — 2014
BITS Pilani Work Integrated Learning Programmes
Master of Technology - MTech, Microelectronics and VLSI
RV-VLSI VLSI and Embedded Design Center
Advanced Diploma in ASIC design - Full Custom
2018 — 2019
S J B Institute of Technology, BANGALORE
Bachelor of Engineering, Electrical, Electronics and Communications Engineering
2014 — 2018
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