Shrihari Pawar
SMTS Silicon Design Engineer Physical Design / STA
- Role
- Smts Silicon Design Engineer at AMD
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Shrihari Pawar
Total 9+ years of working experience with Semiconductor industry’s leading company\'s like Qualcomm, Synopsys, LSI (Acquired by AVAGO ).• Developing the Embedded Memory with Synopsys.• Worked on Physical Implementation of Memory, Wireless networking chips.• RTL to GDS development experience with various foundry like TSMC, UMC, Intel, SMIC.• Technology Node worked on 10nm, 14nm,16nm, 28nm, 40nm, 90nm, 180nm.• Holding reach knowledge of every aspect VLSI chip design like Verilog RTL development, Floorplanning, Placement of multimillion gate count netlist, Building Clock Tree’s, Routing congested design, Power Analysis, Fixing Physical design violations.• Very good understanding of Time Analysis part of design with signal integrity & Noise issue. • Detailed knowledge of semiconductor physics (CMOS transistor) & Metal behavior.• Also holding Knowledge on DFT, ATPG test pattern generation & validation.• Detail conceptual Knowledge of Low Power Physical Design Methodology.• Hands on experience with debugging test bench with delay annotated netlist simulation.• Exposure with Industry Standard tools like ICC, Prime Time, Design Complier, VCS, ICV, Calibre, TetraMax, Liberty compiler, Virtuos, Star-RCXT.• Love to explorer myself in lightning fast changing Semiconductor World & Happy to be a part designing future Technology.• Quick Learner, Self Motivated and Competition loving Person.
Experience
Smts Silicon Design Engineer
Apr 2025 — Present · Bengaluru, IN
Education
Amravati University
Bachelor of Engineering (B.E.), Electrical, Electronics and Communications Engineering
2006 — 2010
Birla Institute of Technology and Science, Pilani
Master of Engineering (M.Eng.), Microelectronic
2011 — 2013
Skills
- Rtl Design
- Cmos
- Integrated Circuits (Ic)
- Prime Time (Synopsys)
- Model Sim (Mentor Graphics)
- Cadence Virtuoso
- Starrcxt (Synopsys)
- Vhdl
- Simulations
- C++
- Cadence
- Ic
- Primetime
- System on a Chip (Soc)
- Verilog
- Silvaco
- Caliber Drc/Lvs
- Modelsim
- Physical Design
- Ic Compiler (Synopsys)
- Keil
- Spice
- Very-Large-Scale Integration (Vlsi)
- Soc
- Vlsi
- C
- Tool Command Language ( Tcl )
- Application-Specific Integrated Circuits (Asic)
- Asic
- Perl
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