Shresth Mathur
ECE @ Purdue | Prev. SWE (FPGA) Intern @ F5
- Role
- Asic Design Lab (Ece337) Ta at Purdue University Elmore Family School Of Electrical And Computer Engineering
- Location
- West Lafayette, IN, US
- LinkedIn followers
- 500 followers
About Shresth Mathur
Experienced with digital design, software design, computer architecture, and networks. I…
Experience
Asic Design Lab (Ece337) Ta
Purdue University Elmore Family School Of Electrical And Computer Engineering
Jan 2025 — Present · West Lafayette, IN, US
Instructing 200+ students in SystemVerilog-based ASIC design and verification, reinforcing RTL industry best standards• Debugging RTL implementations, testbenches, and simulation results to ensure functional correctness and efficiency• Leading lab sessions, providing technical mentorship, and clarifying complex concepts in ASIC design• Evaluating student projects, giving feedback on design efficiency and coding best practices, and helping course admin.
Education
Purdue University
Bachelor of Engineering - B.S.
2022 — 2026
Robbinsville High School
High School Diploma
2018 — 2022
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