Shreekara Murthy

About Shreekara Murthy

Electrical and Computer Engineering graduate student at Portland State University, specializing in Computer Architecture and Design Verification. I have professional experience as a Video HW Design Verification Engineer at Qualcomm India Pvt Ltd in Bengaluru.Technical Skills:• Programming & HDL: Verilog,SystemVerilog, C, C++, Python, • Verification Methodology: Methodology: UVM (Universal Verification Methodology)• Bus Protocols: AMBA AXI4, AHB, APB• Verification: Constrained Random Verification, Assertion Based Verification, Formal Verification,Debugging, Regressions, Test Plan, Code Coverage, Functional Coverage, Emulation• Tools & Technologies VCS, VC Formal, Questa Sim, VC ZO1X (Fault Simulator), FPGA, Linux, Git, Perforce.Experience Highlights:• Drove verification activities to ensure high-quality designs at both the IP and block level. • Supported the development of ADAS products, focusing on meeting ISO 26262 compliance and ASIL-B support.• Used Synopsys VC Formal to enhance verification accuracy and coverage through formal methods.• Conducted functional and code coverage analysis to ensure thorough verification of designs.• Automated manual tasks and enhanced verification efficiency for video core validation using Python scripting.

Experience

1. Silicon Engineer

   Cognichip

   Feb 2026 — Present · Redwood City, CA, US

Education

• PES University

  Bachelor of Technology - BTech, Electronics and Communications Engineering

  2016 — 2020

• Portland State University

  Master of Science - MS, Electrical and Computer Engineering