Shravya P
Design Verification Engineer
- Role
- Design Verification Engineer at Meyvnsystems
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Design Verification Engineer
Feb 2021 — Present · Bengaluru, IN
DDR4, AXI, APB, SPI, Unified Power Format, Gate level Simulation, SV, UVM, Functional Coverage, Assertions, System on chip(SoC)
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