Shravan Kumar Ashannagari
Staff Design Engineer (Camera ISP RTL) at Qualcomm
- Role
- Staff Engineer at 高通
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Shravan Kumar Ashannagari
I am digital VLSI engineer with expertise in cache design, memory subsytem design, system interconnect design and full chip power analysis for Cortex-M based SoCs.
Experience
Staff Engineer
May 2023 — Present
Education
Osmania University
Bachelor of Engineering (B.E.), Electronics and Communications Engineering
2008 — 2012
Indian Institute of Technology, Bombay
Master of Technology (M.Tech.), Microelectronics and VLSI Design
2012 — 2014
Skills
- Rtl Design
- Multithreading
- Cadence Voltus
- Cadence Incisive
- C++
- Git
- Embedded C
- Integrated Circuit Design
- Amba Ahb
- C
- Svn
- Embedded Systems
- Verilog
- Python
- Vlsi
- Synopsys Primetime
- Systemverilog
- Power Analysis
- Linux
- Ncsim
- Vhdl
- Lint
- Microarchitecture
- Arm Cortex-M
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