Shivansh Joshi

WORK HISTORY

EDUCATION

ABOUT SHIVANSH JOSHI

I am currently working as an FPGA Design Intern at MKU, where I focus on RTL design, FPGA development, and timing-critical digital hardware using industry-standard workflows. Alongside this, I am pursuing an MTech in Embedded System Design at NIT Kurukshetra, building a strong foundation in digital logic and hardware system design.My technical interests lie in RTL design, SystemVerilog, FPGA architectures, and digital IC design, with practical exposure to Verilog/SystemVerilog, Xilinx Vivado, static timing analysis, and computer organization & architecture. In parallel, I serve as a Student Placement Coordinator, which has strengthened my communication, coordination, and leadership skills through collaboration with industry professionals and peers. I am actively seeking opportunities in FPGA and ASIC Design roles to continue growing as an RTL design engineer.