Shivendra Kushwaha
Layout Design Manager Synopsys Bangalore
- Role
- Mgr Ii, a & Ms Layout Design at 新思科技股份有限公司
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Shivendra Kushwaha
16+ year of Experience in Memory Layout Full Custom Development. pursuing M.Tech from…
Experience
Mgr Ii, a & Ms Layout Design
Jul 2022 — Present · Bengaluru, IN
Education
Institute of Management Technology, Ghaziabad
Master of Business Administration (MBA)
2012 — 2017
Pusa Polytechnic under Board of Technical Education Delhi
3 Year TECH DIPLOMA
2000 — 2003
Delhi College of Engineering
B.Tech
2004 — 2010
BITS Pilani Work Integrated Learning Programmes
Master's degree
2017 — 2023
Skills
- Static Timing Analysis
- Cadence Virtuoso
- Vlsi
- Storage
- C
- Functional Verification
- Dfm
- Cdesigner Synopsys
- Memory Test
- Physical Design
- Asic
- Memory Design
- Parasitic Extraction
- Semiconductors
- Lvs
- Ic
- Eda
- Design for Manufacturing
- Tcl
- Very-Large-Scale Integration (Vlsi)
- Debugging
- Virtuoso
- Systemverilog
- System on a Chip (Soc)
- Soc
- Design Rule Checking (Drc)
- Virtuoso Layout Editor
- C++
- Application-Specific Integrated Circuits (Asic)
- Physical Verification
- Compilers
- Layout Versus Schematic (Lvs)
- Ir
- Drc
- Laker Silicon Canvas
- Cmos
- Integrated Circuits (Ic)
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.