Shivangi Gupta

About Shivangi Gupta

Electronics and Communication engineering professional and highly passionate about VLSI design. Looking for a responsible position as a VLSI design engineer with a view to utilize and enhance my skills and experience towards professional growth.Core Competencies-Efficient in Verilog HDL / VHDL-Knowledge of STA ( Static timing analysis), Global set up/Hold and Delay concepts-Basic Knowledge of RC Extraction-Worked on Cadence Virtuoso using GPDK 180nm technology node(NMOS, PMOS, inverter,NAND gate, NOR gate)-Basic Understanding and hands-on experience of Standard Cell Layout Design and schematics- Basic knowledge of CMOS structure, working, and circuits- Basic understanding of memory circuit design- Knowledge of Digital CircuitsTools and Languages known -HDL Design Simulator: ISIM 14.1 project navigator, ModelSim 6.1- Layout Design: Cadence Virtuoso- Operating System: Ubuntu 16.1- FPGA: Spartan 3 Kit- Embedded: AVR studio, Arduino- Others: Proteus, OrCad Pspice-HDL Language: Verilog HDL, VHDL- Software Design: C- Scripting Language: TCL- Platform: Unix/LinuxFamiliar Concepts-Latchup and its prevention-ESD-IR drop-Matching-Shielding-Layouts of digital blocks-Electromigration-Antenna Effects- DRC-LVS-RC circuits-MOSFET

Experience

1. Lead Application Engineer

   Cadence

   Dec 2023 — Present · Noida, IN

Education

• Dehradun Public School

  High school, PCM with Computer Science

  2011 — 2012

• Dehradun Public School

  Intermediate, Science stream with computer science

  2013 — 2014

• ABES Engineering College

  Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering

  2014 — 2018