Shilpa Manocha
RTL Design Engineer-IP @OpenFive(AlphawaveSemi) | NXP | M.Tech ‘21 | Delhi Technological University (Formerly DCE)
- Role
- Rtl Design Engineer at Openfive
- Location
- Delhi, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Rtl Design Engineer
Nov 2021 — Present · Bengaluru, IN
Education
Guru Gobind Singh Indraprastha University
Bachelor of Technology (BTech), Electrical and Electronics Engineering
2012 — 2016
Delhi Technological University (Formerly DCE)
Master of Technology - MTech, Signal processing and digital design
2019 — 2021
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