Shesharaman Kn
Physical Design Engineer
- Role
- Silicon Engineering Manager at Accenture
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Shesharaman Kn
VLSI - Physical Design Engineer
Experience
Silicon Engineering Manager
Dec 2025 — Present · Bengaluru, IN
Education
Vellore Institute of Technology
M.S [by Research], Analog and mixed signal VLSI
2009 — 2013
Don Bosco Institute of Technology
B.E, ELECTRONICS AND COMMUNICATIONS
2001 — 2005
Coventry University
M.Sc [Engg.], VLSI SYSTEM DESIGN
2005 — 2007
Skills
- Tcl
- Analog
- Analog Circuit Design
- Xilinx
- Verilog
- Physical Design
- Fpga
- Asic
- Integrated Circuit Design
- Microprocessors
- Field-Programmable Gate Arrays (Fpga)
- Static Timing Analysis
- Digital Electronics
- Synopsys: Design Compiler, Primetime, Primepower, Ic Compiler Cadence: Rtl Compi
- Embedded C
- Application-Specific Integrated Circuits (Asic)
- Very-Large-Scale Integration (Vlsi)
- Signal Processing
- Mixed Signal
- Circuit Design
- Cadence Virtuoso
- Hardware Architecture
- Microcontrollers
- Cmos
- Vhdl
- Simulations
- Xilinx Ise
- Embedded Systems
- Eda
- Arm
- Rtl Design
- Linux
- Modelsim
- Arm Architecture
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