Shehzad Rasheed

About Shehzad Rasheed

With extensive experience in embedded systems, I excel in transforming complex designs into products. My focus is real-time FPGA-based signal processing, optimizing latency, throughput, area, and power. I pride myself on turning challenging specifications into successful projects and continue to innovate in embedded systems.Field Programmable Gate Arrays-Design, testing, and integration of complex FPGA firmware targeting Xilinx, Intel, and Lattice FPGA devices.Creating test benches and regression testing for simulating FPGA design (Modelsim/Questasim/Vivado).The FPGA device selection, resource estimation, pin planning, and power estimation/sequencing as per requirements.Bring up and validate the FPGA designs on prototype and custom FPGA hardware.FPGA Design Tools-Xilinx ISE, Vivado, Model/QuestaSim, Diamond Lattice, and Intel Quartus.HDL Languages-Verilog and VHDLProgramming/Scripting Languages—C, C++/ TCL, PythonEmbedded Protocols-AXI4, SPI, IIC, UART, DDR4, JESD204C, Ethernet 1/10/40/100 G, UDP/TCP, and Aurora 8B10B/64B66B.Lab Tools-Oscilloscope, DMM, VNA, RF Spectrum Analyzer, RF power meters.Mixed-Signal Hardware Development-Skilled in schematic designing (Cadence Orcad).Experienced in PCB schematic design of multi-FPGA, DSP, and ADC boards.Experienced in multi-layer PCB board bring-up and debugging (up to 14 layers).Skilled in power supply design using a controller for sequencing and monitoring.Experienced in the development and execution of system-level qualification test plans including electrical, environmental, emission, and immunity.Experienced in EMC/EMI testing and debugging.Algorithm, Automation, and Software-Strong concepts of signal processing/Image processing.Skilled in algorithm development in MATLAB.Experienced in block-level sketches to final hardware.Expertise in interfacing ADC, FPGA, and DSP.Self-starter and a good team playerExperience and willingness for lab testingLanguages-Scripting - TCL, Python.Programming - C/C++.Hardware Descriptive - Verilog, VHDL.

Experience

1. Senior Fpga Design Engineer

   Abaco Systems

   Aug 2021 — Present · Austin, TX, US

   Digital system design for signal processing applications (SDR, RADAR, SIGINT).* FPGA microarchitecture design, RTL and test bench design.* Develop and execute the validation plan for high bandwidth interfaces.* Ultra-high sample rate ADC/ DAC* Ethernet 1G/10G/40G/100G - JESD204C - Aurora * Board to board – JESD204C/Aurora/AXI* High speed memory interfaces DDR3/DDR4* FPGA planning, ICDs, schematic/code reviews, board bring-up and system integration.* Customer support for Abaco products integration into systems.

Education

• COMSATS Institute of Information and Technology

  BS Electrical (Computer) Engineering, Computer Hardware Engineering

  2010 — 2014

• National University of Sciences and Technology (NUST)

  Master of Science - MS, Electrical Engineering

  2016 — 2020

Skills

• Python
• Image Processing
• C++
• Digital Signal Processors
• Xilinx
• Embedded Systems
• Signal Processing
• C
• Computer Vision
• Verilog
• C
• Programming
• Linux
• Modelsim
• Data Structures
• Microcontrollers
• Electronics
• Fpga
• Autocad
• Matlab
• Visual Studio