Shayan Ahmad
Digital IP Design Intern @Silicon Labs | C2S DIR-V Grand Challenge Finalist | Inter-IIT Tech Meet 12.0 Gold medalist
- Role
- Digital Ip Design Intern at Silicon Labs
- Location
- Bhagalpur, BR, IN
- LinkedIn followers
- 500 followers
About Shayan Ahmad
I am currently pursuing my B.Tech in Electrical and Electronics Engineering from IIT Patna, where I am focused on digital design engineer with strong experience in FPGA-based hardware–software co-design, specializing in post-quantum cryptography acceleration and high-performance embedded systems. My work centers on translating complex mathematical algorithms into timing-optimized hardware architectures and integrating them seamlessly with embedded processors.I have designed and integrated NTT and Point-Wise Multiplication accelerators on FPGA, interfaced with a MicroBlaze processor using AXI-Stream, AXI-Lite, and DMA. Through careful pipelining, timing closure, and system-level optimization, I achieved reliable operation at 100 MHz, reducing cryptographic computation from CPU-level milliseconds to microsecond-scale hardware execution. My experience also includes AXI protocol verification, DMA-based data movement, performance profiling, and memory bottleneck analysis, enabling end-to-end system optimization rather than compute-only acceleration.Beyond accelerators, I actively work on secure embedded systems, combining hardware acceleration, cryptography, and system architecture to build scalable and industry-relevant solutions.Key Skills & DomainsFPGA Design & Verification (Verilog, AXI, DMA)Hardware–Software Co-DesignPost-Quantum Cryptography (NTT, ML-KEM primitives)Performance & Timing OptimizationEmbedded Systems & Secure ArchitecturesAchievementsInter IIT Tech Meet Gold Medalist (12.0)C2S DIR-V Grand Challenge Finalist (Ongoing) – Developing a quantum-secure surveillance system with a focus on secure data transmission and system-level resilienceI am driven by roles that sit at the intersection of hardware acceleration, security, and real-world system deployment, particularly in semiconductor, defense, and deep-tech industries.
Experience
Digital Ip Design Intern
Jan 2026 — Present · Hyderabad, IN
Education
Indian Institute of Technology, Patna
Electrical and Electronics Engineering , Digital Design
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