Shashank V.

About Shashank V.

I graduated with a master’s degree in Electrical Engineering from the University of Washington, Seattle, with a focus on computer architecture and ASIC Design. I have experience with RTL Design using SystemVerilog, programming and scripting experience with Python and C, and have previously worked on the on-chip interconnection network in REDEFINE, a RISC-V Multi-Processor System-on-Chip (MP-SoC).I worked as a Research Assistant to Prof. Michael Taylor at the University of Washington, working on the BlackParrot RISC-V multicore processor. I contributed to the memory hierarchy of the processor, with most of my focus on the L1 Caches. I have worked on enabling different memory organizations for the I-Cache and D-Cache, providing support for a writethrough D-Cache and designing a easy-to-use interface to the next level. I was also a Teaching Assistant to Prof. Scott Hauck for the course Digital Circuits and Systems in Winter 2020, where the responsibilities included holding office hours, supervising student lab demos involving digital designs implemented on the DE1-SoC FPGA, and grading labs and exams.

Experience

1. Senior Hardware Engineer

   SambaNova

   Oct 2025 — Present · Palo Alto, CA, US

Education

• University of Washington

  Master of Science - MS, Electrical Engineering

  2019 — 2021

• National Institute of Technology Karnataka

  Bachelor of Technology, Electronics and Communications Engineering

  2015 — 2019

• RV PU College

  Pre-University, Science

  2013 — 2015