Shantanu Lele

About Shantanu Lele

Principal Engineer at Marvell with 14+ years of experience in hardware verification across Storage, Mobile, Automotive, and Data Center SoCs. I specialize in building state-of-the-art UVM-based verification environments, power-aware simulations (VCS + UPF), and AMBA protocol–driven interconnect verification.I bring deep expertise in Verilog, SystemVerilog, Python, VHDL, and related verification methodologies, with extensive hands-on experience developing IP, Sub-System, and Full-Chip testbenches. My work focuses on solving complex verification challenges, driving automation, improving coverage efficiency, and ensuring robust, high-performance silicon.Passionate about innovation and engineering excellence, I enjoy collaborating across teams to deliver scalable, reliable verification solutions that help bring next-generation SoCs to life.

Experience

1. Principal Engineer

   Marvell Technology

   Sep 2021 — Present · Pune, IN

   Engaging with sophisticated SoCs while continually evolving my expertise toward the frontier of intelligent systems.

Education

• Savitribai Phule Pune University

  Bachelor of Engineering - BE, Electrical and Electronics Engineering

• Birla Institute of Technology and Science, Pilani

  Master of Technology - MTech, Microelectronics

• CDAC ACTS

  P.G.Diploma in VLSI and Embedded System Design

  2010 — 2011

Skills

• Soc
• C++
• Uvm
• Fpga
• Asic
• Rtl Coding
• Ncsim
• Embedded Systems
• Vhdl
• Verilog
• Debugging
• Power Aware Simulations
• Application-Specific Integrated Circuits (Asic)
• Python
• Modelsim
• Systemverilog
• C
• Amba Ahb
• Arm
• Vlsi
• Ddr3
• Rtl Design
• Functional Verification