Shanoof Basith
SoC Design Verification Engineer at AMD
- Role
- Senior Silicon Design Engineer at AMD
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Shanoof Basith
Inspired by the Impact of Tech on the world and dream to contribute at the highest level to make a meaning full Impact and benefit.As a DV Engineer (7+ years), I have worked on- AMD Server Soc (EPYC)- Exynos Automotive SoC -Vision Based SoC based on Arc Processors -Automotive Soc based on Arm-Exynos Mobile SoC-SoC for multiple IOT applications (Arm Processors)-Test Chip- Worked briefly on Coverage Closures for USB 3.2 IP by which gained a fundamental understanding of USB 3.2 Protocol. On SoC & IP front, worked on- PCIE for Server SoC -SoC PMUs-low power verification (With GLS)-Thermal Management Unit- Safety Memory Protection Controller (Freedom from Interference-Part of Automotive Safety #FuSa)- Fault Management Unit- Network on Chip- SPI- SD Card -SoC Interrupts, OOB for Arm Processors -CLK-RST Block-GPIO Modules. The exposure has cemented & enhanced my knowledge on SoC Architecture, UVM, RAL, Assertions, Coverage, SV, GLS. Protocols such as AXI, APB and AHB. I thoroughly enjoy and passionately curious about coming up with innovative solutions. This has reflected in winning the Best Paper Award for the paper titled “Automation of Verification Environment for Asic Front End Verification” at L&T-TS TechExpression (2018), Winning Second Place for work on the Project “Automation of Radiant Warmer” (2016) at SJEC.
Experience
Senior Silicon Design Engineer
Dec 2023 — Present · Bengaluru, IN
Education
St Joseph Engineering College, Mangaluru
Bachelor of Engineering (BE)
2012 — 2016
Maven Silicon
Advanced VLSI Design and Verification Course
2017 — 2017
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