Aleem Ur Rehaman
ASIC Design and Verification Engineer at Microsoft || Ex- AMD, Intel
- Role
- Silicon Engineer 2 at Microsoft
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Aleem Ur Rehaman
Seasoned Technical Engineer in ASIC Design & Verification with over a decade of…
Experience
Silicon Engineer 2
Oct 2023 — Present · Bengaluru, IN
Working for DPU Team in Microsoft building and verifying Hardware Accelerators for Cloud+ AI business Unit- Verification of xp9 and xp10 Decompression Accellerators IP for Microsoft DPU Chip- Gate Level Simulations of Xpress Control Plane Clusters- Nand Flash Block Subsystems with RISCV Controller, AXI Bridge and CSR Based DMA Access- QSYS Memory Responder BFMs for Entire Clusters- Building UFS 4.0 based Stack for Memory Management replacing eMMC- Designing a MIPS Based Cache BFM / MIPS Cache Protocol (MCP)
Education
HKBK Group of Institutions
Bachelor of Engineering (B.E.), Electronics and communication Engineering
2012 — 2016
Bright High School
10th, School
1997 — 2010
St.Josephs pre-University College
12th, PCMB
2010 — 2012
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