Nazeer
sr silicon design engineer in AMD.
- Role
- Sr Silicon Design Engineer at AMD
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Nazeer
Experienced Physical Design Engineer with a demonstrated history of working with synopsys and services industry. Skilled in static timing analysis, know tools like prime_time, icc2_shell, dc_shell, and physical verification(drc & lvs)
Experience
Sr Silicon Design Engineer
Feb 2026 — Present · Hyderabad, IN
Excited to join Advanced Micro Devices (AMD) as a Senior STA Engineer!With 7 years of experience in VLSI design and Static Timing Analysis, I have worked extensively on timing closure, constraint development, signoff analysis, and cross-functional collaboration across synthesis, PnR, and physical design teams.Looking forward to contributing to high-performance, power-efficient semiconductor solutions and being part of cutting-edge innovation.#AMD #VLSI #STA #Semiconductor #TimingClosure
Education
Pragathi
High School Diploma
2010 — 2012
Dkop labs
Training
2018 — 2018
Lovely Professional University
Bachelor of Technology
2014 — 2018
Sri Chaitanya Junior College
High School Diploma
2012 — 2014
Lovely Professional Universiy
Bachelor of Technology (BTech) hons
2014 — 2018
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