Sergio Golombek

About Sergio Golombek

IC designer with broad experience in most aspects of Digital and Mixed-Signal ASIC. Worked in several successful startups, with large company experience in between. Interested in challenging design flow development for nanometer technologies, emphasizing signal-integrity, low-power, and design-for-manufacturing.Specialties: IC design, specializing in Physical (backend) Design. Digital ASIC and Custom. Deep Submicron. 65nm. Place & Route, floorplanning, timing closure, timing analysis, signal-integrity, low-power design, layout verification.Library/IP evaluation and maintenance.

Experience

1. Engineer, Principal Manager

   Qualcomm

   Nov 2018 — Present · San Jose, CA, US

Education

• Stanford University

  M.S.Electrical Engineering, Electrical Engineering - Semiconcuctors,Computer Architecture

• Colegio Rio Branco

  High School Diploma, Exact Sciences

  1978 — 1980

• USP - Universidade de São Paulo

  Electrical Engineer, Electrical Engineering - Microelectronics, Digital Design

  1981 — 1985

Skills

• Floorplanning
• Physical Design
• Semiconductors
• Integrated Circuit Design
• Tcl
• Low-Power Design
• Application-Specific Integrated Circuits (Asic)
• Asic
• System on a Chip (Soc)
• Static Timing Analysis
• Timing Closure
• Place & Route
• Layout Verification
• Flow Development
• Soc
• Very-Large-Scale Integration (Vlsi)
• Verilog
• Ic
• Integrated Circuits (Ic)
• Primetime
• Eda
• Vlsi