Aleksei Shustov
Principal Design Team Lead @Accelercomm
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WORK HISTORY
Principal Design Team Lead @Accelercomm
Southampton, GB
EDUCATION
Saint Petersburg State Marine Technical University
Master's Degree, Telecommunications Engineering
SKILLS
ABOUT ALEKSEI SHUSTOV
Over of 16 years RTL design using SystemVerilog/VHDL for DSP and Wireless Communication- Develop test benches with SystemVerilog and simulate designs with Modelsim- Deep understanding of DSP algorithms and algorithms used in Wireless Communication (OFDM, modulation/demodulation, channel equalization, FEC, etc)- Design bit-to-bit accurate Matlab and Python NumPy models, provide Fixed-Point conversion- Hands-on experience with various types of FPGA (Intel/Xilinx) including SoC systems based on ARM processor- Familiarity and experience with many data interfaces (Ethernet, PCIe, DRAM, AXI, SPI, I2C, etc.)- Multiple clock domain designs and static timing analyze- Working knowledge of C language, Git, Linux- Scripting with TCL and Python- Ability to quickly pick up new concepts and contribute with innovative solutions
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