Narayanan Seetharaman
Analog Design Engineer @Texas Instruments
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WORK HISTORY
Analog Design Engineer @Texas Instruments
Freising, DE
Working as analog design engineer with Focus area : DCDC converter, Phase Locked Loops(PLL) and AMS Verification.
EDUCATION
V S S University Of Technology
B.Tech, Electronics & TeleCommunication Engg
Kendriya Vidyalaya
+2, PCM
University of Stuttgart
Master’s Degree, Microelectronics and Optoelectronics
SKILLS
ABOUT NARAYANAN SEETHARAMAN
Analog Mixed Signal IC design engineer with more than 8 years of design experience. Focus Areas: DC-DC converters, Charge Pump, Phase Lock Loops (PLL) and Pipeline ADC.In addition to circuit design and AMS verification experience, I also have 1 year of analog layout design experience. Two of my major contribution in PLL circuit design are -> Have proposed and realized in silicon new architecture for storage cells in Semi-Digital PLL-> Have proposed a new TDC architecture to achieve 1ps resolution without averaging.My contributions in DCDC converter design are -> A self regulated average current balancing IP, which achieves A pure PFM (single clock, no pulse bursting) mode in a peak PWM converter to provide higher efficiency at light loads with controlled Vout ripple for OLED display application-> Adaptive slope compensation for current mode control topology, which tracks real-time Vin, Vout, Frequency, Inductor and Rsense without any external component or OTP programming-> A bidirectional input -output average current conversion circuit-> Analog circuit along with digital core to hop multiple user programmable frequencies with least impact to efficiency
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