Sayeesh Kapu
- Role
- Analog Design Engineer at Intel
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Sayeesh Kapu
Analog Design Engineer at Intel, working on die to die I/O design. • Worked as an…
Experience
Analog Design Engineer
Aug 2016 — Present
Analog engineer working on die to die I/O
Skills
- Wireless
- Analog Circuit Design
- Power Amplifiers
- Pll
- Rf Test
- Delta Sigma Modulators
- C
- Cadence Virtuoso
- Agilent Ads
- Board Station Xe
- Matlab
- Pspice
- Mentor Graphics
- Embedded Systems
- Analog Ic
- Debugging
- Programming
- Data Structures
- Dc-Dc Converters
- Rf Design
- Switch Capacitor
- Spectrum Analyzer
- Cadence
- Vhdl
- Network Analyzer
- Microsoft Office
- C++
- Adcs
- Vlsi
- Verilog
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