Sayandwip Sarkar
Senior Physical Design & AI Engineer at Nvidia| Ex-Qualcomm| NIT Jamshedpur
- Role
- Senior Physical Design & Ai Engineer at NVIDIA
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Sayandwip Sarkar
10+ years of experience in Physical Design Engg.Strong understanding in the RTL2GDSII flow or design implementation in leading process technologies and having good expertise related to synthesis, place & route, CTS, timing convergence, layout closure.Expertise on high frequency design methodologies. Good knowledge and experience in Block-level and Full-chip Floor-planning and Physical verification. Working experience with tools like Innovus, Primetime etc used in the RTL2GDSII implementation.Strong knowledge and experience in standard place and route flows Innovus/Cadence flows preferred. Well versed with timing constraints, STA and timing closure.Good automation skills in PERL, TCL, tool specific scripting on one of the industry leading Place & Route tools.In-depth understanding IR drop, power/signal electro -migration and ESD sign off in a most challenging block from SOC i.e. NSP.Power bump planning & RDL routingAbility to multi-task and flexibility to work in global environment.Good communication skills and strong motivation, Strong analytical & Problem solving skills. Proficiency using Perl, Tcl & Python* M-Tech in VLSI Design and Embedded System from NIT Jamshedpur with CGPA 9.14
Experience
Senior Physical Design & Ai Engineer
May 2024 — Present · Bengaluru, IN
Education
West Bengal University of Technology, Kolkata
Bachelor of Technology (BTech), ELECTRONICS AND COMMUNICATION ENGINEERING
2008 — 2012
National Institute of Technology Jamshedpur
Master of Technology (MTech), VLSI DESIGN AND EMBEDDED SYSTEMS
2013 — 2015
A.C.Institution,Malda
Higher Secondary, Science
2000 — 2007
Skills
- Verilog
- Electromigration
- Embedded C
- Matlab
- Electronics
- Physical Design
- Redhawk
- Tcl
- Vhdl
- Esd Control
- Java
- Rdbms
- C
- Perl Automation
- Perl
- C -Shell
- Embedded Systems
- Xilinx Ise
- 8051 Microcontroller
- Cadence Voltus
- Html5
- Very-Large-Scale Integration (Vlsi)
- Simulink
- Timing Closure
- Vlsi
- Cadence Encounter
- Ptpx
- Vivado 2014.1
- J2ee Web Services
- C++
- Static Timing Analysis
- J2se
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