Sayandeep Nag

About Sayandeep Nag

Presently Part of ARM, Semiconductors Methodology Team for Front End / Verification and Low Power Ex NXP Hardware Architecture Team for Low PowerEx Qualcomm CPU Power Performance Area Optimization Team and SoC Power Lead for Snapdragon Mobile processors. Oversee and coordinate all low power efforts of the digital die, which include power requirements and specification, power estimation and analysis, power distribution, and power verification.Past experience includes complete front-end flow including SoC and module-level RTL, Synthesis, timing constraints and timing closure, formal verification, clock domain crossing, low power static checks using conformal low power, and Verdi signoff low power. Experience in Silicon IPs like USB 2.0 and Wireless USB. Expertise in power management, both at IP and SoC level along with Unified Power Format (UPF) methodology. Have prior experience in ASIC design and functional verification, BFM development, full chip integration, test plan formulation, test case writing, assertion based verification, code coverage analysis. Have presented multiple papers in international conferences and have guided interns for their Master\'s Thesis. Working knowledge on protocols like TCP / IP, PCI / PCI X / PCI Express, AHB, I2C etc.Goal: To Be a System On Chip (SoC) Level ArchitectSpecialties: Front End Design, ASIC / SoC Integration, MicroArchitecture, Verification Process, Verilog RTL, Static Timing Analysis, Formal Verification, ECO, FPGA Prototyping and Team Management.

Experience

1. Director of Engineering

   Arm

   Jun 2025 — Present · Bengaluru, IN

Education

• Sacred Heart Convent High School, Bhopal

  School, Junior High/Intermediate/Middle School Education and Teaching

  1991 — 1993

• Bangalore University

  Bachelor's degree, Electrical, Electronics and Communications Engineering

  1996 — 2000

• Indo-German Training Centre Bangalore

  Executive Business Management, Business Administration and Management, General

  2012 — 2013

• Manipal Academy of Higher Education

  MS VLSI CAD, VLSI

  2002 — 2004

• Army School Bangalore

  CBSE 12th Standard, CBSE

  1993 — 1996